Systems and apparatuses consistent with present disclosure relate to a memory device, and more particularly, to a memory device robust to coupling noise in a read-while-write operation, and memory system using the same.
Non-volatile memory devices using a resistance material include phase-change random access memory (PRAM), resistive RAM (RRAM), and magnetic RAM (MRAM). In order to accommodate the increasing capacity and integration of non-volatile memory devices, a read global bit line for reading data from a first non-volatile memory cell, and a write global bit line for writing data to a second non-volatile memory cell are together implemented in a memory cell array of non-volatile memory devices. For instance, a read-while-write operation, in which a read operation on one memory area is performed while a write operation on another memory is performed, may be achieved.
However, since a write voltage is applied to one global bit line and a read voltage is applied to another global bit line during the read-while-read operation, coupling noise may occur between adjacent global bit lines, which may deteriorate the data reliability of semiconductor memory devices.